CYA-WP-0005 T02 done (ralph iter 2): Formalize Profile 0 baseline everywhere

- MemoryVision.md: Large new 'Profile 0 Baseline (Post-0003 / Current Shipped)' section with exact ports, activation logic, retrospection, safety invariants, usage sites, and relationship to 1–3 (plus the prior research section from T01).
- src/cya/memory/__init__.py: Updated module docstring to declare Profile 0 reality + references to MemoryVision + CYA-WP-0005.
- src/cya/orchestrator.py: Updated docstring with Profile 0 memory wiring note.
- SCOPE.md: Named Profile 0 explicitly in delivered slices and core capabilities.
- tests/test_memory.py: Added two new explicit 'Profile 0' tests + comments asserting provenance markers, kinds, activation_context support (T02 acceptance).
- README.md + AGENTS.md: Added Profile 0 mentions + links to the workplan.

All T02 acceptance criteria met. Ralph loop active. Next: T03 (full Profiles 1–3 definitions + matrix).
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"""phase-memory ports (T05 → T02) — cya seam to phase-memory (markitect).
"""phase-memory ports — cya seam to phase-memory (markitect).
See CYA-WP-0002 T01 contract in MemoryVision.md for full details.
This module is the explicit, inspectable boundary. All memory for
assistance (preferences, project context, etc.) flows through here.
assistance (preferences, project context, retrospection outcomes, etc.)
flows through here.
Current state (T01 complete): signatures refined per phase-memory
architecture (phases: ephemeral/fluid/stabilized/rigid; kinds incl.
preference; planners for lifecycle/activation; low-level ports:
MemoryGraphStore, MemoryEventLog, PolicyGateway, etc.). Implementations
remain no-op + loud warn until T02 wires real delegation.
**Profile 0 (current shipped baseline, post CYA-WP-0003):**
Real user-controlled local JSON backing (~/.config/cya/memory/<scope>.json)
with full support for kinds (preference, retrospection, interaction_goal),
activation_context (cwd + git root boosting), provenance in every return,
remember_retrospection_outcome helper, by_kind export, and graceful
degradation. This already delivers contextual activation and a continuous
user-driven optimization loop via `cya retrospect`.
Operator direction (2026-05): keep the seam minimal and replaceable;
no hidden stores, full explainability via provenance + dry-run plans
in recall results.
See:
- MemoryVision.md → "Profile 0 Baseline (Post-0003)" section for the
complete description of the current implementation and invariants.
- CYA-WP-0005 (especially T02) for formalization of this as the stable
foundation for Profiles 13.
- CYA-WP-0002 T01 contract (below in this file's history + MemoryVision)
for the original seam definition.
The public API signatures are stable. Future phase-memory integration will
replace the local JSON backing and add planners/synthesis/procedural support
while preserving (or compatibly extending) this surface and all
explainability/safety guarantees.
"""
from __future__ import annotations

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"""Assistance orchestrator (T06).
"""Assistance orchestrator.
The piece that turns raw user intent + collected context into a well-formed
request for the LLM adapter (T04), then turns the adapter response into the
request for the LLM adapter, then turns the adapter response into the
final terminal output the user sees.
Responsibilities in this slice:
- Own the end-to-end happy path after Typer argument parsing.
- Coordinate context collector (T02), risk classifier (T03), and LLMAdapter (T04).
- Keep the CLI surface (main.py) thin — it should only do argument parsing,
help/version, and delegation to this orchestrator.
- Be testable in isolation with the FakeLLMAdapter (critical for T07).
Key responsibilities:
- Coordinate context collector, memory (Profile 0 via recall with activation_context),
rule-based risk classifier, and LLMAdapter.
- Wire memory influence into every assistance cycle and `--explain-context`.
- Own the `cya retrospect` flow that feeds higher-order memory back into the system.
- Keep the CLI surface thin.
This module is the natural home for future prompt framing, context packing
with token awareness, safety charter injection, and response post-processing.
**Memory note (Profile 0):** This module is the primary consumer of the
stable memory ports defined in src/cya/memory/__init__.py. All calls use
activation_context derived from the current working directory + git root.
See MemoryVision.md "Profile 0 Baseline" and CYA-WP-0005 for the evolution
path to Profiles 13.
See workplan CYA-WP-0001-T06.
See workplan CYA-WP-0001 (core) + CYA-WP-0003 (memory wiring + retrospect)
+ CYA-WP-0005 (profile formalization).
"""
from __future__ import annotations