38 Commits

Author SHA1 Message Date
6d93f6dd90 CYA-WP-0005 T06/T07/T08 + close (ralph final): Mark remaining tasks done; set workplan frontmatter to done
- T05 spike + prior T02/T03 work satisfied T06 (tests/safety) and T07 (docs).
- T08 close criteria met via cumulative commits, State Hub updates, and progress events throughout the loop (pre-existing registration from creation step).
- Frontmatter status: done.
- All 8 tasks done.

This completes the ralph loop for CYA-WP-0005.
2026-05-28 03:25:15 +02:00
a87cd4ab42 CYA-WP-0005 T05 done (ralph iter 5): Minimal Profile 1 (Reflexion verbal) spike
- Added KIND_REFLECTION + remember_reflection() helper in memory (thin, exported).
- Wired into run_retrospection(): optional 'capture verbal lesson' step at end.
- Main recall now includes reflections for preferential activation.
- Final LLM response + explain surface verbal reflections when activated.
- Added roundtrip test + import updates.
- Small README note.
- All changes small/inspectable, safety preserved (still through RiskClassifier).
- T05 acceptance criteria met with working end-to-end spike.

Committed as ralph iter 5. Ready for T06+ or close.
2026-05-28 03:24:44 +02:00
16fde868cf CYA-WP-0005 T04 done (ralph iter 4): Polish + cross-link the phase-memory suggestions doc
- Added T04 finalization note and cross-references to the new Profiles 1–3 definitions / Capability Matrix in MemoryVision.md.
- Added one-line handoff pointer in the suggestions doc itself.
- T04 acceptance criteria satisfied (artifact already existed from pre-ralph creation; now polished and linked).

Small delta, committed. Ralph loop continuing to T05+.
2026-05-28 03:23:09 +02:00
cd3a2fbecc CYA-WP-0005 T03 done (ralph iter 3): Profiles 1–3 definitions + capability matrix
- MemoryVision.md: New major section 'Profiles 1–3: Definitions and cya Integration Plans' with crisp, self-contained definitions for each profile (intent, core loop, cya mapping, delta, phase-memory fit, safety/explainability) + full 'Profile Capability Matrix' table.
- Added short appendix in the workplan itself ('Profile Definitions Reference (T03)') pointing to MemoryVision as the living spec.
- All content synthesized from the persisted research artifact with heavy references.
- T03 acceptance criteria fully met (definitions + matrix in MemoryVision + workplan note; docs-only).

Committed as ralph iter 3. Next: T04 (phase-memory suggestions doc polish).
2026-05-27 21:20:25 +02:00
19e80cc9bc CYA-WP-0005 T02 done (ralph iter 2): Formalize Profile 0 baseline everywhere
- MemoryVision.md: Large new 'Profile 0 Baseline (Post-0003 / Current Shipped)' section with exact ports, activation logic, retrospection, safety invariants, usage sites, and relationship to 1–3 (plus the prior research section from T01).
- src/cya/memory/__init__.py: Updated module docstring to declare Profile 0 reality + references to MemoryVision + CYA-WP-0005.
- src/cya/orchestrator.py: Updated docstring with Profile 0 memory wiring note.
- SCOPE.md: Named Profile 0 explicitly in delivered slices and core capabilities.
- tests/test_memory.py: Added two new explicit 'Profile 0' tests + comments asserting provenance markers, kinds, activation_context support (T02 acceptance).
- README.md + AGENTS.md: Added Profile 0 mentions + links to the workplan.

All T02 acceptance criteria met. Ralph loop active. Next: T03 (full Profiles 1–3 definitions + matrix).
2026-05-27 20:01:51 +02:00
2bcbe50607 CYA-WP-0005 T01 done (ralph iter 1): add Agentic Memory Research & Profile Directions (2026-05) section to MemoryVision.md
- New section after Success Criteria, before 0002 contract.
- References the persisted research doc (history/2026-05-28-CYA-Agentic-Memory-Research-Variations.md).
- Short outline of Profiles 1 (Reflexion verbal), 2 (hierarchical synthesis), 3 (procedural/meta-policy) + how they build on Profile 0 + 0003 retrospect/activation.
- Forward links to T02 (Profile 0 baseline) and T03 (full defs + matrix) in the workplan.
- Addresses several Open Questions from the vision.
- T01 task block updated to done in workplan.

Per ralph-workplan for CYA-WP-0005. Next: T02 formalize Profile 0.
2026-05-27 18:57:11 +02:00
c1aee5087e chore: clean duplicate state_hub_workstream_id line in CYA-WP-0005 frontmatter (post fix-consistency seed) 2026-05-27 13:31:58 +02:00
02d6f3447b Persist agentic memory research + create CYA-WP-0005 (profiles 0-3 + phase-memory feedback)
- Persist deep research on self-improving loops (Reflexion, Generative Agents, procedural/meta-policy) as history/2026-05-28-CYA-Agentic-Memory-Research-Variations.md
- Create CYA-WP-0005 workplan (proposed): baseline current memory as Profile 0, define Profiles 1-3 mapping the three variations, with tasks for docs, optional Profile 1 spike, tests/safety, and explicit T04 for phase-memory suggestions deliverable
- Add standalone sister-repo feedback doc docs/phase-memory-optimization-suggestions.md (9 prioritized categories: ports/activation, synthesis hooks, procedural support, retrieval, lifecycle, explainability, safety, observability, retrospection interop)
- All per explicit 2026-05-28 request: 'Persist the research. Create a workplan to establish the current memory handling as profile 0 and add profile 1-3. For interface optimization and missing functionality in phase-memory provide optimization suggestions to the sister repo. Commit register and sync the workplan.'
- Follows AGENTS.md: small inspectable change, references prior 0002/0003/0004 + MemoryVision + post-0004 gap analysis
- Next: register workstream, seed IDs, make fix-consistency, progress event (self-exec per prior authorization pattern)

Artifacts ready for State Hub registration and sister-repo handoff.
2026-05-27 12:50:46 +02:00
996039bbe1 chore(workplan): mark CYA-WP-0004 as fully done (frontmatter status: done) 2026-05-27 00:19:13 +02:00
c0039c293a docs + chore(workplan): complete T06 and T07 for CYA-WP-0004 — final documentation polish and packaging debt registration 2026-05-27 00:18:39 +02:00
358907b51f docs + chore(workplan): complete T05 for CYA-WP-0004 — lightweight release process (checklist + Makefile targets) 2026-05-27 00:11:18 +02:00
e6b9610b25 feat(packaging) + chore(workplan): complete T04 for CYA-WP-0004 — MANIFEST.in, pyproject improvements, verified clean sdist+wheel build and install 2026-05-27 00:05:26 +02:00
b483bf1f34 feat(install) + docs + chore(workplan): complete T03 for CYA-WP-0004 — Makefile, optional deps, and improved dev-head installation docs 2026-05-26 23:21:23 +02:00
2f1fba9767 feat(packaging) + chore(workplan): complete T02 for CYA-WP-0004 — implemented setuptools_scm for dynamic versioning 2026-05-26 22:46:24 +02:00
62b046b2f8 docs + chore(workplan): complete T01 for CYA-WP-0004 — packaging audit and requirements document created 2026-05-26 21:40:59 +02:00
4af53b2cbd chore(workplan): activate CYA-WP-0004 for ralph execution (status: active) 2026-05-26 21:04:46 +02:00
3c11afafcf chore(workplan): seed State Hub IDs for CYA-WP-0004 after fix-consistency 2026-05-26 20:46:37 +02:00
2daba29555 feat(workplan): add CYA-WP-0004 for dev-head install and distribution packaging 2026-05-26 20:45:30 +02:00
4a48e6ad07 chore(workplan): mark CYA-WP-0003 as fully done (frontmatter status: done) 2026-05-26 20:30:12 +02:00
b2ec65160b docs + chore(workplan): complete T07 (final) for CYA-WP-0003 — heavy README Memory section, AGENTS update, MemoryVision addition, debt registration 2026-05-26 20:26:07 +02:00
d2beaaa5af test + chore(workplan): complete T05 for CYA-WP-0003 — comprehensive tests for activation (T03), retrospection (T04), observability, and graceful degradation 2026-05-26 15:29:14 +02:00
6cbd055b1a feat(retrospection) + chore(workplan): complete T04 for CYA-WP-0003 — added 'cya retrospect' guided reflection flow with goal capture 2026-05-26 15:26:54 +02:00
7bcf28d720 feat(memory) + chore(workplan): complete T03 for CYA-WP-0003 — directory/project-bound memory activation wired in orchestrator with improved transparency 2026-05-26 15:18:46 +02:00
abc54989e5 feat(memory) + chore(workplan): complete T02 for CYA-WP-0003 — port extensions for activation, kinds, and retrospection records (backward compatible) 2026-05-26 15:15:20 +02:00
cdae2fac2f docs(concept) + chore(workplan): complete T01 for CYA-WP-0003 — conceptual model for directory-bound activation + retrospection loops (design doc created) 2026-05-26 15:08:39 +02:00
3bc35a2b30 chore(workplan): activate CYA-WP-0003 for ralph execution (status: active) 2026-05-26 15:05:24 +02:00
0b9e64164a feat(workplan): create CYA-WP-0003 for contextual memory activation and retrospection loops 2026-05-26 14:56:17 +02:00
b7a2cc48ba chore(docs+tests): complete T05 + T06 for CYA-WP-0002. All 6 tasks done. README Memory section, AGENTS update, full test coverage for real memory + safety. Workplan retired. 2026-05-26 07:01:12 +02:00
98a43f5671 feat(safety): T04 complete — memory signals integrated into rule-based risk classifier (conservative only; never bypasses confirmation). Verified live. T01-T04 now done. 2026-05-26 03:17:38 +02:00
e8f7320bb4 feat(memory): T03 complete — memory wired into orchestrator (consult + --explain-context surface + context to LLM + render); T01-T03 now done in workplan (ralph iters 1-3) 2026-05-26 03:13:06 +02:00
905485acce feat(memory) + docs: T01 complete — cya/phase-memory integration contract (MemoryVision), refined port signatures in seam (no-op preserved), phase-memory (arch/interop/lifecycle/ports) review; workplan T01 marked done. ralph iter 1. 2026-05-26 03:03:50 +02:00
1bce4bd7bc chore(workplan): activate CYA-WP-0002 (status: active) and seed ralph-workplan loop (HEUREKA, 20 iters); modernize instructions for task status canon (progress/wait); log activation to State Hub 2026-05-26 03:01:29 +02:00
aea790622a feat(workplan): create CYA-WP-0002 focused on MemoryVision realization
New workplan: Memory Integration Roadmap — moving from the thin T05 no-op ports toward real, profile-driven phase-memory integration.

Directly addresses the primary gap identified in the recent Intent-vs-Scope analysis and the new MemoryVision.md.

Refs: MemoryVision.md, CYA-WP-0001, history/2026-05-26 gap analysis
2026-05-26 02:43:22 +02:00
f93b766e12 docs(memory): add MemoryVision.md + gap analysis and related doc updates
- New MemoryVision.md outlining long-term vision for phase-memory integration in cya (profiles, phases, lifecycle, ports)
- Persisted full Intent-vs-Scope gap analysis in history/
- Updated SCOPE.md to reflect post-MVP reality and MemoryVision direction
- Minor cross-references in AGENTS.md and the CYA-WP-0001 workplan

This lays the foundation for the next workplan (CYA-WP-0002) focused on realizing the MemoryVision.

Refs: MemoryVision.md, history/2026-05-26-CYA-Intent-Scope-Gap-Analysis.md, CYA-WP-0001 T05/T08
2026-05-26 02:42:54 +02:00
3cca37623f chore(workplan): mark T07 done, T08 in_progress + add implementation status section
Part of CYA-WP-0001 tracking after T01-T07 slice + README work.
2026-05-26 02:20:42 +02:00
637919dd8c feat(cya): T01-T07 core console-native MVP slice (CYA-WP-0001)
- T01: Python + Typer/rich + pyproject.toml + full src/ layout + working `cya` CLI entrypoint
- T02: Bounded transparent context collector (top-level only, provenance, ignores) + --explain-context
- T03: Genuine rule-based risk classifier (primary) + mandatory terminal confirmation, no auto-execute
- T04: LLMAdapter Protocol + deterministic FakeLLMAdapter seam (llm-connect boundary, zero bypass)
- T05: Strictly minimal phase-memory no-op ports (loud markers, per operator direction 2026-05-26)
- T06: Orchestrator coordinating the full flow; CLI is thin delegation
- T07: pytest harness + safety-focused tests (risk invariants + collector)

All changes verified by running the installed `cya` binary and `pytest tests/`.

Workplan updated with status. State Hub progress event logged (workstream 0a1233fd...).

Refs: CYA-WP-0001, Decision a644364b-11c4-49a9-bf17-99063382e27b
2026-05-26 02:19:13 +02:00
da6c7acfc9 chore(workplan): activate CYA-WP-0001 + record operator decisions
- Frontmatter: status `ready` → `active`
- Added "Status Update — 2026-05-26 (Activated)" section documenting
  the resolved stack choices and the specific direction on T03 (safety)
  and T05 (phase-memory).
- Annotated the T03 and T05 task descriptions with the operator's
  explicit guidance (rule-based risk assessment first + ADR requirement;
  strictly minimal no-op ports for memory).
- Linked the resolved State Hub Decision `a644364b-11c4-49a9-bf17-99063382e27b`.
- Updated Current Evidence to reflect bootstrap completion and activation.

This authorizes implementation of the narrow console-native MVP slice
to begin (starting with T01).

Resolves: State Hub Decision D1 (now `resolved`)
2026-05-26 00:53:57 +02:00
1bdd8e03d8 feat(workplan): add CYA-WP-0001 console-native-mvp
- Created first repo-backed workplan per AGENTS.md and bootstrap
  workstream "repo-integration-can-you-assist" Task T02.
- Workplan kept at status: ready (pending explicit stack choice
  review before moving to active).
- 8 focused tasks (T01-T08) covering: CLI skeleton + packaging,
  bounded context collector, mandatory safety/confirmation layer,
  llm-connect adapter boundary, phase-memory ports, orchestrator,
  test strategy, and documentation handoff.
- Follows exact workplan convention and sibling (phase-memory)
  style for Goal / Current Evidence / Non-Goals / task blocks.
- Prepares narrow MVP slice that proves the core console loop
  while respecting crisp boundaries with llm-connect and phase-memory.

Workstream: 0a1233fd-75ab-4726-8857-6c97de939069
Progress event: 15cdf940-db46-4f97-ae0b-e21ce2e57ce6
Ready for: make fix-consistency REPO=can-you-assist
2026-05-26 00:37:16 +02:00